Simon Davidmann
I help deep-tech start-ups, and the people shaping UK and European semiconductor strategy, using what I have learned from over 40 years of building companies and technologies in Electronic Design Automation (EDA). My work is in three areas:
- Start-ups: advising founders, boards and investors in semiconductor, EDA and AI engineering companies.
- UK and European strategy: contributing to semiconductor and AI strategy with government, think tanks, universities and industry bodies.
- AI+EDA research: how AI applies to chip design and verification, as an AI+EDA researcher at the University of Southampton.
I was founder or first European employee of six EDA start-ups in the US and UK. All six were successfully acquired, for a total of over a billion US dollars in 2026 money. I co-architected the Superlog language, which became SystemVerilog, and founded Imperas, whose processor models and RISC-V verification technology Synopsys acquired in 2023.
Interests
- Startups + technology strategyBuilding and selling deep-tech companies in semiconductors and EDA, and where the next EDA start-ups can win.
- UK + European semiconductor strategySemiconductor and AI sovereignty, and design capability as strategic infrastructure for the UK and Europe.
- AI + EDAHow AI is changing chip design and verification, and what that means for the EDA industry.
- Verification + RISC-VProcessor verification, reference models, RVVI and the RISC-V verification ecosystem.
- History + technical contributionsHILO, Verilog, VCS, synthesis, Superlog and SystemVerilog, virtual platforms and RISC-V.
Questions I am exploring
Start-ups
- What kind of EDA start-up can succeed now that the large EDA vendors and the largest chip companies are all building their own AI tools?
- How should investors back EDA start-ups that aim for step-function improvements?
UK and European strategy
- What do semiconductor and AI sovereignty mean in practice for the UK and Europe, and which parts of chip design capability do they need to control themselves?
- What AI+EDA capability should the UK and Europe build for themselves, and where can their universities, RISC-V community and safety-critical industries lead?
- Who owns, and who can license, the design data that AI tools for chip design need to be trained on?
AI+EDA research
- Does AI change what we can design and verify, or only how fast we run what we already do?
- Can design, verification and implementation be rethought as one system that AI reasons across?
- How should AI-generated design content be verified before it goes into production?
Strategy & Startups
Start-ups. I work with a small number of founders, boards and investors in semiconductor, EDA and AI engineering companies. Having been founder or first European employee of six EDA start-ups in the US and UK, I can help with product and technology positioning, standards and ecosystem strategy, partnerships, and preparing for acquisition.
UK and European strategy. I contribute to semiconductor and AI strategy, including sovereignty, with government, think tanks, universities and industry bodies, through workshops, roundtables, technical review of policy papers and independent analysis. My focus is design capability: EDA software, processor IP and verification, and what AI is changing in each of them.
Latest writing and talks
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From AI-Assisted EDA to AI-Mediated Engineering
Reflections on DAC 2026, where agentic methods made up about 28% of the agenda and AI submissions had risen from under 300 in 2023 to about 700. Sets out the two technical routes, replacing the tool engines or wrapping them, and argues for evidence-grounded loops in which AI proposes and physics, formal methods or simulation decides.
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Harnessing AI for SoC Verification: Disruptive or Collaborative?
Panel on whether AI in SoC verification disrupts current flows or works alongside them.
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Interview with Simon Davidmann, AI + EDA Researcher and Former CEO of Imperas
Interview by Daniel Nenni on the move from Imperas and Synopsys to AI+EDA research at the University of Southampton. Covers how RISC-V users building AI accelerators led to this research, published results of ML in verification ranging from 85% less RTL simulation to 10% better coverage, Davidmann's Dilemma and Test, and why the larger opportunity for start-ups is a holistic rethink of the toolchain.
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Embracing AI for Advanced Design and Verification
Accellera panel on how AI is changing design and verification, and what that means for EDA standards.
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AI in EDA Is Real, It's Now, and It's on Show at DAC 2026
Frank Schirrmeister's preview of DAC 2026, built around two ideas from my work. Davidmann's Dilemma: "every camp acting rationally guarantees the collectively wrong outcome". Davidmann's Test: "Does it change what you can verify, or just how fast you run what you already verify?"
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AI as a Cognitive Amplifier in Modern Design Verification
As design complexity grows, the bottleneck in verification has moved from simulation throughput to engineering cognition: the capacity to take in specifications, traces and coverage data. Introduces a taxonomy for AI in verification and reviews recent academic results in three areas: stimulus generation and coverage closure, test selection and bug triage, and performance prediction.
Research & Patents
My current research, at the University of Southampton, is on AI applied to chip design and verification, presented at DV Club Bristol and DV Club Edinburgh in 2026. Behind it are 40 years of technical work: papers from HILO in 1984 to the ACM history of Verilog in 2020, the book SystemVerilog for Design, five granted US patents and two published applications in simulation and verification, and standards work from SystemVerilog to the RISC-V Verification Interface (RVVI).
11 papers · 7 patents · 35 talks · 28 articles
About
I started in EDA in 1980 as a Research Fellow at Brunel University, working on HILO, the first RTL simulation system. Since then I have worked on Verilog at Gateway, VCS at Chronologic, silicon IP at Virtual Chips and synthesis at Ambit, co-founded Co-Design Automation, which created SystemVerilog, and founded Imperas, which Synopsys acquired in 2023. From 1984 to 1988 I developed electronic drums and percussion instruments at Simmons. I left Synopsys in December 2025.
Beyond technology
CyclingJohn O'Groats to Land's End in 2015, two years after cancer surgery, and Oxford to Paris ten years later.
Olympic skeetCompeting since 2011, and six times shooting for England.
Vintage Riley racingRacing four 1930s Riley racing cars.
MusicFestival Chairman of the Thame Town Music Festival, the cello, and vintage guitars.
Simmons electronic drums and percussionTechnical Director at Simmons, 1984 to 1988.