AI + EDA
As large language models and agent frameworks mature, Electronic Design Automation (EDA) vendors and chip design teams are adding AI to most steps of the design and verification flow. At DAC 2026 agentic methods made up about 28% of the conference agenda, and AI submissions had risen from under 300 in 2023 to about 700. Machine learning is already delivering results in verification: published work reports up to 85% less RTL simulation for the same result, and coverage improvements of around 10%.
Most of this work so far is AI-assisted EDA: a model helps an engineer write a testbench, summarise a failing simulation log or suggest a constraint, and the engineer still drives each tool. The next step is AI-mediated engineering, where agents plan and run sequences of tool steps and engineers review the results. Vendors are taking two routes to get there: replacing the engines inside the tools with AI-native ones, or wrapping the existing tools with an orchestration layer. Both are legitimate, and they carry different risks.
Davidmann's Dilemma and Davidmann's Test
The chip design ecosystem is mostly using AI to accelerate what it already knows how to do. Every group involved, from the large EDA vendors and the agentic start-ups to the in-house teams at the largest chip companies, is acting rationally for itself, and together they produce a collectively poor outcome. Frank Schirrmeister named this Davidmann's Dilemma in EE Times.
The related test I apply to any AI tool for chip design is: does it change what you can design and verify, or does it only speed up what you already do? A tool that only does the second has value, and it still fails the test.
Where I think the opportunity is
- A holistic toolchain. Today's flows are built from separate tools for design, verification and implementation, made for human engineers over the last four decades. AI can reason across the whole stack if the toolchain is designed for it. Agentic AI layered on the existing tools is a stage on the way there.
- Evidence-grounded loops. AI proposes, and physics, formal methods or simulation decides. This is how AI-generated design content can reach production without silent errors.
- Models with real domain structure. Foundation models specialised with formal and domain structure, open APIs between tools, and serious collaboration between industry and universities.
- Training data. Most of the data available is "human first", produced for engineers to read. A big open question is where appropriately licensed training data for chip design will come from.
My research
I am an AI+EDA researcher at the University of Southampton. My current work surveys how machine learning and large language models are being applied across design verification, from stimulus generation and coverage closure to test selection, bug triage and performance prediction, and what verification methods are needed when AI generates the design content. I presented this work at DV Club Bristol and DV Club Edinburgh in 2026.
Questions I am exploring
- Does AI change what we can design and verify, or only how fast we run what we already do?
- Can design, verification and implementation be rethought as one system that AI reasons across?
- How should AI-generated design content be verified before it goes into production?