About
I advise deep-tech start-ups and contribute to UK and European semiconductor and AI strategy, and I am an AI+EDA researcher at the University of Southampton.
Career
I studied Electronic Engineering at the University of Essex (BSc and MSc), and started in EDA as a Research Fellow at Brunel University, in the team that developed HILO, the first RTL simulation system. In 1983 I moved to the US to sell and support HILO.
From 1984 to 1988 I was Technical Director of Simmons, developing processor-based electronic drums and percussion instruments. In 1988 I became the first European employee of Gateway Design Automation, the company that created Verilog. After Chronologic Simulation, Virtual Chips and Ambit Design Systems, I co-founded Co-Design Automation in 1998, where we created Superlog, which became SystemVerilog. Synopsys acquired Co-Design in 2002.
In 2005 I founded Imperas, which built processor models, virtual platforms and, from 2015, RISC-V processor verification technology. Synopsys acquired Imperas in 2023, and I was Vice President Engineering, Processor Modeling and Verification at Synopsys until December 2025.
Along the way I was a Visiting Lecturer at King's College London (1994 to 1998), teaching CAD/EDA on the MSc in Digital Systems and serving on the external undergraduate advisory board, a Visiting Professor at the Centre for Digital Music, Queen Mary, University of London (2004 to 2014), a member of the Accellera Board (1999 to 2002), and chair of the OpenHW Verification Task Group (2022 to 2023). I have been a board adviser or non-executive director of several UK private companies.
The full story, company by company, is on the History page. Life outside work is under Beyond technology.
Biographies for organisers
For event organisers and editors, in the third person.
Short (about 50 words):
Simon Davidmann is an AI+EDA researcher at the University of Southampton. Over 40 years he was founder or first European employee of six EDA start-ups in the US and UK, all acquired. He co-created Superlog, which became SystemVerilog, and founded Imperas, acquired by Synopsys in 2023.
Longer (about 150 words):
Simon Davidmann is an AI+EDA researcher at the University of Southampton, UK, and advises deep-tech start-ups and organisations working on UK and European semiconductor strategy. Over 40 years in Electronic Design Automation (EDA) he was founder or first European employee of six EDA start-ups in the US and UK, all successfully acquired. He co-founded Co-Design Automation, where he co-architected Superlog, which became the IEEE SystemVerilog standard, and co-wrote SystemVerilog for Design. In 2005 he founded Imperas, which developed processor models and RISC-V verification technology, including the open standard RISC-V Verification Interface (RVVI); Synopsys acquired Imperas in 2023. He co-wrote the ACM paper Verilog HDL and its ancestors and descendants (2020), holds five US patents in simulation and verification, and was a Visiting Professor at Queen Mary, University of London, for ten years.
Contact
You can email me at:
web at davidmann dot com