-
A New Era For Co-Processing
Quoted on co-processor architectures for AI: the winning co-processor minimises data movement, software friction and verification risk at the same time.
-
RISC-V Models for Verification, Software Development and Architectural Exploration
-
Software Development for ML and RISC-V Vector Accelerators
-
RISC-V & SoC Architectural Exploration for AI and ML Accelerators
-
Extending Cortex-M33 With Custom Instructions for Security Algorithms
-
Optimizing RISC-V Custom Instructions with Software Driven Analysis and Profiling
-
Avoiding Amdahl's Law: RISC-V Architecture Exploration for AI & ML Compute
-
Cycle Approximate Simulation of RISC-V Processors
A technique for adding timing information to instruction-accurate simulation of RISC-V processors, so fast virtual platforms can be used for timing estimation early in a project.
-
System-level exploration tools for MPSoC designs