Simulation

21 December 2023 · EE Times, Nitin Dahad · Report · Featured

Synopsys Acquires RISC-V Processor Simulation Tools Firm

29 July 2021 · Semiconductor Engineering, Lee Moore and Simon Davidmann · Article · Co-author

RISC-V Verification: The 5 Levels Of Simulation-Based Processor Hardware DV

2018 · Embedded World Conference 2018 · Conference paper

Cycle Approximate Simulation of RISC-V Processors

Lee Moore, Duncan Graham, Simon Davidmann, Felipe Rosa

A technique for adding timing information to instruction-accurate simulation of RISC-V processors, so fast virtual platforms can be used for timing estimation early in a project.

March 1984 · Computer-Aided Design, vol. 16, no. 2 · Journal paper

HILO-2: a system to build on

R.L. Harris, S.J. Davidmann, G. Musgrave

DOI

1984 · CAD84 conference proceedings, pp. 48–60 · Book chapter

HILO-2: A system to build on

R.L. Harris, S.J. Davidmann, G. Musgrave

DOI