SystemVerilog

2 March 2021 · DVCon US 2021, Virtual · Session · Host

A personal perspective on the history of SystemVerilog / Superlog

With: Phil Moorby, Peter Flake

June 2020 · Proceedings of the ACM on Programming Languages, vol. 4, HOPL IV, article 87, pp. 1–90 · Journal paper

Verilog HDL and its ancestors and descendants

Peter Flake, Phil Moorby, Steve Golson, Arturo Salz, Simon Davidmann

An invited paper for the fourth ACM History of Programming Languages conference (HOPL IV) on the history of Verilog, the languages that led to it, and the languages that followed it, including SystemVerilog.

ProgrammeDOI

2000 · Asia and South Pacific Design Automation Conference (ASP-DAC 2000), pp. 583–586 · Conference paper

Superlog, a unified design language for system-on-chip

Peter L. Flake, Simon J. Davidmann

DOI